1. Field of the Invention
The present invention relates to liquid crystal display devices such as active matrix type devices including a plurality of thin film transistors. The invention more particularly relates to a liquid crystal display device which can prevent variations in video images such as a drop in the brightness caused by rounding of the waveform of video signals.
2. Description of the Related Art
In conventional active matrix type liquid crystal display devices, there is a source driver to drive a thin film transistor provided on a one-pixel-basis. FIG. 1 is a circuit diagram of the configuration of a conventional liquid crystal display device. In the conventional liquid crystal display device, a thin film transistor is provided for each of the pixels arranged in a matrix. A plurality of thin film transistors TL1, . . . , Tm1, Tn1, . . . forming the first column have their drains connected in common to a drain line D1. Similarly, a plurality of thin film transistors T12, . . . , Tm2, . . . , Tn2, . . . forming the second column have their drains connected in common to a drain line D2. Thus, a plurality of thin film transistors T1a, . . . , Tma, . . . , Tna, . . . forming the a-th column have their drains connected in common to a drain line Da.
The drain lines are connected with output buffers B1, B2, B3, B4, . . . provided at a source driver 11.
A plurality of thin film transistors T11, T12, T13, T14, . . . forming the first row have their gates connected in common to a gate line G1. Similarly, a plurality of thin film transistors Tm1, Tm2, Tm3, Tm4, . . . forming the m-th row have their gates connected in common to a gate line Gm, and a plurality of thin film transistors Tn1, Tn2, Tn3, Tn4, . . . forming the n-th row have their gates connected in common to a gate line Gn. Thus, a plurality of thin film transistors Tb1, Tb2, Tb3, Tb4, . . . forming the b-th row have their gates connected in common to a gate line Gb.
In the conventional liquid crystal display device having the above-described configuration, a video signal is supplied from the output buffers B1, B2, to the drain lines D1, D2, respectively. The gate lines G1, . . . , Gm, . . . , Gn, . . . are supplied with a control signal from a vertical driver (not shown), and each thin film transistor turns on/off in response to the control signal. When the thin film transistor is turned on, the video signal supplied to the corresponding drain line is applied to the liquid crystal for the pixel, so that a video image based on the video signal is displayed on the display.
In the conventional display device described above, however, there are resistance and capacitance parasitic in the drain line, and its time constant increases from the input end on the output buffer side to the terminal end on the opposite side. As a result, the video signal is rounded in the waveform. More specifically, as shown in FIG. 1, when one vide signal is output from the output buffer B1 to the drain line D1, he thin film transistor T11 connected to the gate line G1 in the first row is provided with a normal square signal, but the thin film transistor Tm1 connected to the gate line Gm in the m-th row is provided with a signal having a rounded waveform. Furthermore, the thin film transistor Tn1 connected to the gate line Gn in the n-th row provided farther from the output buffer B1 is provided with a signal having a more rounded waveform. When the distance from the output buffer B1 exceeds a prescribed value, the wave height at the time of falling is lower than a prescribed level.
A pixel stores a signal voltage at the time of falling of the signal, and therefore if the value decreases, the luminance changes, which causes variations in video images. If, for example, an image in white is to be displayed on the entire display screen, the brightness decreases as the distance from the output buffer increases.
Therefore, in order to prevent such variations in video images depending on the distance from the source driver, a liquid crystal display device which outputs a video signal from both sides of the drain line has been suggested (Japanese Patent Laid-Open Publication No. 10-274762).
The conventional liquid crystal display device disclosed in this publication could reduce variations in video images compared to the devices before then, but the disadvantage associated with the waveform rounding is not solved. In the central part of the drain line, there exist video image variations. In addition, this technique requires two drivers in some cases, and therefore should not be considered sufficient in terms of reduction in the area and the cost.
It is an object of the present invention to provide a liquid crystal display device which can prevent video image variations caused by parasitic resistance and parasitic capacitance in a drain line.
A liquid crystal display device according to the present invention comprises a plurality of pixels arranged in a matrix, a drain line provided for each column of the plurality of pixels, a gate line provided for each row of the plurality of pixels, an output buffer to output a vide signal to be supplied to the drain line, and a video correction signal generator to superpose a correction signal on the output signal of the output buffer.
According to the present invention, the video correction signal generator superposes a correction signal on the output signal of the output buffer, so that even with waveform rounding caused by parasitic resistance and capacitance in the drain line, the wave height of a video signal at the time of falling can be appropriately adjusted when the signal is supplied to a desired pixel. As a result, video image variations can be prevented.
The pixel may include a thin film transistor having a drain connected to the drain line and a resistive element connected in series to the source of the thin film transistor. The resistance value of the resistive element is desirably reduced as the length of the drain line between the pixel and the video correction signal generator is increased. If a resistive element having a prescribed resistance value is connected in series to the source of the thin film transistor, voltage applied to the liquid crystal can be appropriately adjusted even if a large video signal is input to the pixel.
The video correction signal generator may include a differentiator to differentiate the output signal of each of the output buffers and an adder to add the output signal of each of the differentiators and the output signal of each of the output buffers, and may output the output signal of each of the adders to a corresponding one of the drain lines. Alternatively, the video correction signal generator may include a differentiator to differentiate an externally input reference pulse, and an adder to add the output signal of the differentiator and the output signal of each of the output buffers, and may output the output signal of each of the adders to a corresponding one of the drain lines.
The differentiator may generate a signal having a suitable peak at least in one of the rising and falling of the output signal of the output buffer or the reference pulse. If the differentiator is shared among drain lines, the area occupied by the circuit may be reduced.
It should be noted that the video correction signal generator described above desirably has a correction signal changing system to change a waveform of the correction signal in association with the length of the drain line between the pixel to be supplied with the video signal and itself.
The video correction signal generator is thus provided with the correction signal changing system so that a video signal suitable for a pixel provided for each gate line can be provided depending upon the resistance and capacitance parasitic in the drain line.
The video correction signal generator may include a differentiator to differentiate the output signal of the output buffer, an integrator to integrate the output signal of the differentiator and output the result of integration in association with an input first disenable signal, an inverting integrator to invert and integrate the output signal of the differentiator and output the result of integration in association with an input second disenable signal, a first adder to add the output signal of the integrator and the output signal of the inverting integrator, and a second adder to add the output signal of the first adder and the output signal of the output buffer.
The video correction signal generator may also include a differentiator to differentiate an externally input reference pulse, an integrator to integrate the output signal of the differentiator and output the result of integration in association with an input first disenable signal, an inverting integrator to invert and integrate the output signal of the differentiator and output the result of integration in association with an input second disenable signal, a first adder to add the output signal of the integrator and the output signal of the inverting integrator, and a second adder to add the output signal of the first adder and the output signal of the output buffer.
If such differentiators and integrators are shared among drains, the area occupied by the circuit may be reduced.
The nature, principle, and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals.